Towards a Software-Hardware Co-Designed Resilient System

With continued CMOS scaling, future shipped hardware will be increasingly vulnerable to in-the-field faults. To be broadly deployable, the hardware reliability solution must incur low overheads, precluding use of excessive redundancy. We explore a co-designed hardwaresoftware solution that treats most hardware faults as software bugs and leverages common mechanisms for hardware and software reliability, thereby amortizing some of the overhead. Fundamental to such a solution is a characterization of how hardware faults in different microarchitectural structures of a modern processor propagate through the application and OS. In this paper, we first summarize such a characterization for permanent faults. Motivated by this characterization, we discuss our software-hardware co-designed approach for detecting, diagnosing, recovering from, and repairing/reconfiguring around hardware errors.